Company Name
Microchip Technology Inc
Job Role:
Trainee Engineers
Experience
Freshers
Job Description
Trainee Engineer – Software (2 Positions)
· Firmware development for different ASICs / Customer product
· PC Tools development/Software development kits (SDK)
· Low level device drivers for different peripherals like USB, Ethernet, I2C, SPI, etc.
· FPGA / Post silicon validation of new core and peripherals
· Development of automated validation PC tools & Labview based automation
· Documentation – Design document, Test plan, Test reports and User manuals.
· Design and development of customer demo & silicon validation boards
Trainee Engineer - Design - (2 Positions)
· Micro-architecture and Design
· Implementation in Verilog, System Verilog, VHDL and Block Level Verification
· Synthesis
· Static Timing Analysis and Closure
· Design for Testability, Power Estimation
· Mapping design to FPGA and Pre-silicon Validation
Trainee Engineer – Verification - (2 Positions)
· Contribute to Block level test case generation.
· Participate in Block level test environment design & implementation
· Continuous knowledge accumulation on basic to increasingly complex design blocks such as Memory controllers, Bus interfaces, Networking protocol standards
· Participate in chip level test environment implementation
· Participate in test plan creation for block level - moving towards participation in chip level test plan
· To gain knowledge on various test bench environments using Verilog/System Verilog & and to participate in their development
Trainee Engineer - CAD (3 Positions)
· To perform full chip / block level Physical design activities on Complex SOCs (USB Hubs, Wireless audio SOCs etc.) and Mixed signal ASIC’s
· To perform chip level layout integration, Timing closure, IR drop analysis and chip level verification
· To perform Physical design automation – includes block IP integration checks, Standard cell validation and support
· To perform full chip Physical design on 55nm TSMC / Global and work on Low power designs
· Learn existing Microchip Physical design and methodologies and contribute toward improvements
Eligibility Criteria:
For Design, Verification, Physical design, Hardware job position
Streams eligible to appear : B.E in ECE, EEE, E&I; ME in related stream
Strong n basic electronics, digital circuits, logic design etc.
For firmware/software job position
Streams eligible to appear : B.E in CS, IT, ECE; ME in related stream
SE - Sound understanding of micro controllers, C, data structures & assembly lang
Education
BE/BTech
Location
Chennai, India
Website
http://www.microchip.com/
Apply Last Date
As Soon As Possible (ASAP)
How To Apply
More Details & Apply Online
Note: Apply Every Day - Before Link Expire, Than You Got Call
Microchip Technology Inc
Job Role:
Trainee Engineers
Experience
Freshers
Job Description
Trainee Engineer – Software (2 Positions)
· Firmware development for different ASICs / Customer product
· PC Tools development/Software development kits (SDK)
· Low level device drivers for different peripherals like USB, Ethernet, I2C, SPI, etc.
· FPGA / Post silicon validation of new core and peripherals
· Development of automated validation PC tools & Labview based automation
· Documentation – Design document, Test plan, Test reports and User manuals.
· Design and development of customer demo & silicon validation boards
Trainee Engineer - Design - (2 Positions)
· Micro-architecture and Design
· Implementation in Verilog, System Verilog, VHDL and Block Level Verification
· Synthesis
· Static Timing Analysis and Closure
· Design for Testability, Power Estimation
· Mapping design to FPGA and Pre-silicon Validation
Trainee Engineer – Verification - (2 Positions)
· Contribute to Block level test case generation.
· Participate in Block level test environment design & implementation
· Continuous knowledge accumulation on basic to increasingly complex design blocks such as Memory controllers, Bus interfaces, Networking protocol standards
· Participate in chip level test environment implementation
· Participate in test plan creation for block level - moving towards participation in chip level test plan
· To gain knowledge on various test bench environments using Verilog/System Verilog & and to participate in their development
Trainee Engineer - CAD (3 Positions)
· To perform full chip / block level Physical design activities on Complex SOCs (USB Hubs, Wireless audio SOCs etc.) and Mixed signal ASIC’s
· To perform chip level layout integration, Timing closure, IR drop analysis and chip level verification
· To perform Physical design automation – includes block IP integration checks, Standard cell validation and support
· To perform full chip Physical design on 55nm TSMC / Global and work on Low power designs
· Learn existing Microchip Physical design and methodologies and contribute toward improvements
Eligibility Criteria:
For Design, Verification, Physical design, Hardware job position
Streams eligible to appear : B.E in ECE, EEE, E&I; ME in related stream
Strong n basic electronics, digital circuits, logic design etc.
For firmware/software job position
Streams eligible to appear : B.E in CS, IT, ECE; ME in related stream
SE - Sound understanding of micro controllers, C, data structures & assembly lang
Education
BE/BTech
Location
Chennai, India
Website
http://www.microchip.com/
Apply Last Date
As Soon As Possible (ASAP)
How To Apply
More Details & Apply Online
Note: Apply Every Day - Before Link Expire, Than You Got Call
0 comments:
Post a Comment